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2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
MODE REGISTER WRITE Command
In systems sharing a ZQ resistor between devices, the controller must prevent t ZQINIT,
t ZQCS, and t ZQCL overlap between the devices. ZQRESET overlap is acceptable. If the
ZQ resistor is absent from the system, ZQ must be connected to V DDCA . In this situation,
the device must ignore ZQ calibration commands and the device will use the default
calibration settings.
Figure 67: ZQ Timings
T0
T1
T2
T3
T4
T5
Tx
Tx + 1
Tx + 2
CK#
CK
CA[9:0]
MR addr MR data
ZQINIT
t ZQINIT
CMD
MRW
NOP
NOP
NOP
NOP
NOP
Valid
ZQCS
t ZQCS
CMD
MRW
NOP
NOP
NOP
NOP
NOP
Valid
ZQCL
t ZQCL
CMD
MRW
NOP
NOP
NOP
NOP
NOP
Valid
ZQRESET
t ZQRESET
CMD
MRW
NOP
NOP
NOP
NOP
NOP
Valid
Notes:
1. Only the NOP command is supported during ZQ calibrations.
2. CKE must be registered HIGH continuously during the calibration period.
3. All devices connected to the DQ bus should be High-Z during the calibration process.
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
93
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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相关代理商/技术参数
MT42L256M32D4KP-MS
制造商:Micron Technology Inc 功能描述:256MX32 LPDDR2 PLASTIC IND TEMP GREEN WFBGA 1.2V - Bulk